The invention relates generally to printed wiring boards, and deals more particularly with a method for filling holes such as plated through holes in a printed wiring board.
Printed wiring boards (PWBs), such as printed circuit boards, chip carriers or multi-chip modules, are well known and comprise one or more layers of dielectric material laminated together. Some of the layers include conductors or signal lines printed on the dielectric layer and other layers may comprise a sheet of metal laminated, plated or evaporated onto the dielectric layer to serve as a ground or power plane. Typically, a surface layer includes printed conductors, metallic pads and components mounted to the pads. The components may include resistors, capacitors, amplifiers, processor chips, memory chips, application specific integrated circuits, optical devices, etc. Also, such components could be any of the foregoing electronic devices mounted on a carrier, the carrier being mounted onto the PWB. Some of the printed conductors on the surface layer connect to the pads and thereby participate in electrically connecting the respective components to other components, power and ground. However, because of surface area limitations, the surface layer may not be able to accommodate all the printed conductors that are required. Therefore, plated through holes (PTHs) and blind vias are also provided (by drilling, punching or ablating) in the PWB to interconnect printed conductors on the surface layer to printed conductors or metallic planes on inner layers. Some of these printed conductors are also connected to the surface pads to which components are mounted. Thus, the printed conductors and metallic planes on the inner layers also participate in the connections for the components on the surface layer.
The PWB undergoes additional processing after the PTHs and blind vias are formed, and the PTHs and blind vias may interfere with that processing. Typically, the PTHs and blind vias are formed through the PWB at a time when a metal sheet forms the surface of the PWB. Then, the printed conductors and surface pads are formed either using a positive or negative photolithography process, where a photoimageable material (PIM) is used to define the conductors or their compliment, and a subtractive etching or pattern plating process is used to form the features. In a subsequent manufacturing process, a PIM may also be applied for use as a solder mask or protective coating above the conductors, or as a permanent dielectric material on which an additional metal layer is deposited and subsequently circuitized.
A wide array of PIMs is available commercially in positive or negative tones, in various thicknesses, in dry or liquid form, as etch or plating resists, and for temporary use or permanent application as solder mask. In every case, the PIM is uncured initially, and is viscous and deformable, the liquid having a lower viscosity than the dry film materials. For a negative PIM, exposure to UV light through a mask partially cures the PIM, increasing its viscosity. Additional exposure, or the application of heat, will further cure the PIM and increase its viscosity to a glassy state. Temporary photoresists are typically used in the circuitized process, and are removed after the circuit lines are formed. Permanent photoresists are used for solder mask and as dielectric layers and are more resistant to chemicals used in printed wiring board fabrication processes than temporary resists.
An example of a subtractive etching process using a PIM follows. After drilling the PTHs and blind vias, the entire printed wiring board is plated with copper 0.7 mils thick, including the surface, the PTHs and vias. Then a dry film negative PIM such as Hercules CFI 1.3 is applied over the copper metal layer. Selected portions of the PIM in the shape of the desired conductors are cured by ultraviolet (UV) light passing through a mask. After UV light exposure, the uncured portions of the PIM are developed or washed away with 1% solution of sodium carbonate. The now exposed portions of the copper metal sheet are then removed using a wet etching process with chemicals such as cupric chloride to form the printed conductors underneath the cured portions of the PIM. Then, the cured portions of the PIM are removed using a stripper such as duPont S1100x.
An example of the use of a PIM in pattern plating is as follows. After the PTHs and blind vias are formed by drilling or other means, a thin layer (100 micro-inches or less) of copper is plated electrolessly (or otherwise deposited) onto the entire printed wiring board surface and the walls of the PTHs and blind vias. Then a dry film PIM such as Hercules CFI 1.3 is applied over the thin copper layer. Then selected portions of the PIM in the complimentary shape of the desired conductors are cured by UV light passing through a mask. Then, the uncured portions of the PIM are developed or washed-away using a solution of sodium carbonate. Then, the thin metal sheet is electrically connected to a common potential, and the exposed portions of the thin metal sheet are electrically plated with copper to the desired thickness to form the printed conductors. Finally, the cured PIM is removed using duPont S1100x stripper, and the thin copper layer that was underneath the cured PIM is removed by a flash etch using an aqueous solution of cupric chloride.
An example of a use of PIM in a solder mask application is as follows. A liquid PIM such as Taiyo PSR-4000 AUS-5 is applied over the metal layer after it has been circuitized. Then the PIM is exposed to UV light through a mask with the desired pattern of the solder mask. The unexposed solder mask is then washed away in a developing solution such as 1% sodium carbonate and the mask is then fully cured. The purpose of the solder mask is to protect the circuitry on the top layer of the printed wiring board, and to restrict the flow of solder in any subsequent assembly process.
An example of use of a PIM as a permanent dielectric layer is as follows. A dry film PIM such as Morton Chemical's Laminar LB-404 is applied over the circuitized metal layer, PTHs and blind vias. The PIM is then exposed with UV light everywhere except where holes called photovias are intended for subsequent connection to underlying metal layer. The PIM is then developed with propylene carbonate to remove unexposed PIM from the photovias and then the PIM is fully cured. Next a copper plating process is used to plate the photovias and the surface of the PIM. The surface copper is then subtractively circuitized to form conductors on top of the permanent PIM. Finally, another PIM may be applied as a solder mask as described above.
In each of the printed wiring board fabrication steps described above, certain problems can arise in the use of PIMs due to the presence of holes in the printed wiring board. Despite the viscosity of the PIM when initially applied to the surface of the printed wiring board, the PIM may sag into the PTHs or blind vias and yield a non-planar surface of the PIM. This non-planarity degrades the resolution of the subsequent curing process because the UV mask is shaped for a planar surface and the depth of field is very limited.
Furthermore, the PIM applied to the surface of printed wiring board may not be able to tent across the diameter of the PTH without rupturing. In the case of a PIM used for circuitization, such rupturing could allow corrosive process chemicals into the PTH, resulting in damage to the PTH. In the case of a permanent PIM used as a solder mask, a ruptured tent would allow solder or flux to enter the PTH, causing damage to the PTH and disrupting the assembly process. Similarly, liquid adhesives that are used to reinforce surface mounted components such as integrated circuits may seep into the holes, wasting adhesive and even contaminating the back side of the PWB. To avoid ruptured tents over holes in the printed wiring board, thicker and less conformable photoresists are required, resulting in a greater standoff and poorer resolution. Moreover, in order for such photoresist to be properly adhered over the PTH, it must extend appreciably beyond the inner diameter of the PTH. This results in wasted surface area on the printed wiring board by resulting in larger lands around the PTHs in the circuitize process. In the case of a PIM used as solder mask, less of the printed wiring board surface is available for pads used for interconnecting surface mounted components. In one approach to conserving surface area, U.S. Pat. No. 5,487,218 discloses a conductive fill material within PTHs. A component such as an integrated circuit on a carrier is soldered directly over the filled PTH. Consequently, it is not necessary to utilize additional surface area to provide a printed conductor leading to a pad which receives the component. Likewise, free ends of wires of wire-bonded components can be connected directly over the PTH instead of to a pad spaced from the PTH. U.S. Pat. No. 5,487,218 also discloses a method for filling the PTHs with the conductive fill material by first applying the fill material to a sheet of copper, placing the sheet over the PWB and then using a vacuum to draw the fill material into the holes. While this filling method is effective, an alternate filling method would be desirable in some circumstances.
A general object of the present invention is to provide a technique to fill PTHs and blind vias in a simple and effective manner.